Semiconductor Laboratory (SCL), Chandigarh — Builders — IndiaBUILD

The registry · Builder record

R&D

Assessed stage · IndiaBUILD, from evidence

—

Claimed stage · the builder's own words

01

Capabilities attempted

00

Dated updates

Attempting

Highlight

Advanced process design kit and EDA toolchain

Emerging software

↳ blocks 2 products

Evidence

independently corroborable, distinct from claims

1 · [milestone] SCL operates 8-inch wafer fab at 180nm CMOS technology; 20 chip designs from 17 academic institutions fabricated under DLI scheme

Dated updates

No updates recorded yet.