Tata Electronics (Dholera fab with PSMC, Taiwan) — Builders — IndiaBUILD

The registry · Builder record

Study

Assessed stage · IndiaBUILD, from evidence

—

Claimed stage · the builder's own words

01

Capabilities attempted

00

Dated updates

Attempting

Highlight

DRAM capacitor cell architecture

No capability process

Evidence

independently corroborable, distinct from claims

1 · [milestone] Tata Electronics and Taiwan's Powerchip Semiconductor Manufacturing Corp (PSMC) approved for Dholera fab, 50,000 wafer starts/month at 28nm, first chip by end-2026.
2 · [milestone] Tata-PSMC fab in advanced construction; covers 28-90nm nodes for logic, power electronics, not DRAM memory.

Dated updates

No updates recorded yet.