Can India build a DRAM capacitor cell?

Inside every memory chip sits a structure so small it defies intuition: a capacitor storing a single bit of charge, paired with one transistor that controls access to it. This 1T-1C cell — one transistor, one capacitor — is the atom of DRAM. Fabricating it at scale is something only about six companies on Earth can do. India is not among them.

The difficulty is physical. As cells shrink, the capacitor must hold enough charge in ever less space. Manufacturers do this by going vertical: cylinder-type stacked capacitors, whose inner and outer walls both add surface area, are the current mass-production standard. The industry is now moving toward 4F² cells with pillar-like capacitors, which demand higher aspect ratios and new high-K dielectric materials such as hafnium oxide. The most advanced DRAM processes sit around 12nm. 3D deep-trench architectures push aspect ratios to 50:1 and beyond, with trenches that must be etched and then conformally lined without a single fatal defect. Every layer is a problem in precision physics.

Where India stands is unambiguous. As of 2026, the country has no indigenous DRAM wafer fabrication. Micron's $2.75 billion assembly-and-test facility at Sanand, operational since February 2026, packages and tests finished DRAM and NAND wafers arriving from global fabs — a back-end operation, not fabrication. It builds no capacitor cells. The Tata Electronics–PSMC fab under construction at Dholera, targeting 50,000 wafer starts a month at 28nm with first silicon expected around end-2026, is a logic and power-management line, not memory. India's semiconductor strength today is memory packaging and mature-node logic. For DRAM fabrication, the country imports entirely; roughly 85% of India's semiconductor requirements were imported in 2025.

The gap persists because DRAM sits at the far edge of what fabrication can do. The capacitor cell rests on a stack of foundational capabilities — sub-10nm EUV lithography, atomic layer deposition of high-K films, deep reactive-ion etching, and the metrology to verify leakage below 10⁻⁷ A/cm². These are held by South Korea, the United States, Taiwan, China and Japan. Samsung, SK Hynix and Micron together hold over 95% of the market; China's CXMT reached only 7.7% by early 2026 after years of effort.

What it would take is the full front-end fab chain that India's approved pipeline does not yet contain: sub-10nm lithography, the deposition and etch processes, and the yield control to make a defect-free capacitor billions of times over. The climb begins one node at a time.