The map · Sector

EDA & Design Software

The software the silicon is designed on

43 capabilities mapped · 1 full record
Highlight
3 builders
C·01
Full-flow EDA toolchain (RTL to GDSII)
No capability software
queued
C·02
Compact transistor device models
Unassessed software
queued
C·03
Foundry process design kit access
Unassessed process
↳ blocks 2 products
queued
C·04
Foundry sign-off certification
Unassessed certification
queued
C·05
Logic optimization algorithms
Unassessed software
queued
C·06
Newton-Raphson nonlinear iteration
Unassessed software
queued
C·07
Physical verification (DRC/LVS)
Unassessed software
↳ blocks 2 products
queued
C·08
Physical verification (DRC/LVS) tool
Unassessed software
queued
C·09
Place-and-Route EDA Tool
Unassessed software
queued
C·10
Process Design Kits (PDK)
Emerging materials
queued
C·11
RTL logic synthesis tool
Unassessed software
↳ blocks 2 products
queued
C·12
Semiconductor process node fabrication
Unassessed process
queued
C·13
Sparse matrix linear solver
Unassessed software
queued
C·14
Standard cell library
Unassessed software
↳ blocks 2 products
queued
C·15
Technology mapping engine
Unassessed software
queued
C·16
Analog SPICE circuit simulator
Unassessed software
queued
C·17
Clock tree synthesis
Unassessed software
queued
C·18
Computational geometry engine for IC layout
Unassessed software
queued
C·19
Design rule deck language/compiler
Unassessed software
queued
C·20
Functional verification/simulation tools
No capability software
queued
C·21
HDL front-end parser and elaborator
Unassessed software
queued
C·22
Hierarchical netlist extraction
Unassessed software
queued
C·23
High-performance computing infrastructure
Unassessed hardware
↳ blocks 2 products
queued
C·24
Model parameter extraction methodology
Unassessed process
queued
C·25
Numerical transient integration methods
Unassessed software
queued
C·26
Parasitic extraction
Unassessed software
↳ blocks 2 products
queued
C·27
Power delivery and thermal analysis tools
No capability software
queued
C·28
Process design kit integration
Unassessed software
queued
C·29
Semiconductor device physics
Unassessed materials
queued
C·30
Signal and power integrity analysis
Unassessed software
queued
C·31
Silicon-correlated validation methodology
Unassessed process
queued
C·32
Standard cell library characterization
Unassessed process
queued
C·33
Static timing analysis engine
Unassessed software
↳ blocks 3 products
queued
C·34
Cloud EDA infrastructure
Demonstrated software
queued
C·35
Design data interoperability standards
Unassessed software
queued
C·36
EDA software engineering ecosystem
Unassessed software
queued
C·37
Formal equivalence checking
Unassessed software
queued
C·38
High-performance numerical computing platform
Unassessed software
queued
C·39
Large-scale combinatorial solver infrastructure
Unassessed software
↳ blocks 2 products
queued
C·40
Layout database format handling (GDSII/OASIS)
Unassessed software
queued
C·41
Place-and-route tool interoperability
Unassessed software
queued
C·42
Power estimation and optimization models
Unassessed software
queued
C·43
Standard cell and IP layout libraries
Unassessed software