Advanced semiconductor fabrication (sub-7nm node)

Three companies on Earth can print a transistor smaller than seven nanometres: TSMC in Taiwan, Samsung in South Korea, and Intel in the United States. India is not among them, and as of 2026 it imports 100% of the advanced chips that run its AI systems, mobile devices, defence electronics and high-performance computing.

Sub-7nm fabrication is one of the hardest manufacturing feats humanity has attempted. At these dimensions, features are patterned onto silicon at scales approaching the size of atoms, requiring extreme ultraviolet (EUV) lithography, high-purity silicon wafers, and advanced photoresists and process chemicals — each a specialist discipline in its own right. The narrowing of nodes to three companies is a measure of how unforgiving the process is: capital costs, yield engineering and materials science compound until only the largest and most experienced survive.

India's position is honest and specific. As of May 2026, thirteen semiconductor projects have been approved — twelve under the India Semiconductor Mission (ISM) and one under the Scheme for Promotion of Manufacturing of Electronic Components and Semiconductors (SPECS). These include a single logic and power fab, multiple assembly-test-marking-packaging (ATMP) and OSAT units, and compound semiconductor facilities. The flagship logic fab, a Tata Electronics–PSMC project at Dholera, targets 28 nm and above, with commercial production planned for FY 2029–30. Micron's Gujarat facility handles ATMP — the back-end assembly, test and packaging of DRAM and NAND memory — not wafer fabrication. Under ISM 1.0, approved projects total roughly ₹1.6 lakh crore, concentrated on mature-node fabs and packaging.

There is genuine design capability. Indian startups have completed sixteen tape-outs — the point at which a chip design is finalised for manufacturing — yielding six fabricated chips at nodes as advanced as 12 nm. But that fabrication happens at foundries abroad. India can design at the leading edge; it cannot yet build there.

The gap, then, is not effort but the leading edge itself. India has no sub-7nm logic fab, and none is planned before 2030 at the earliest. For AI accelerators, GPUs and advanced mobile system-on-chips, TSMC, Samsung and Intel remain the only options.

Why the gap persists is structural, and it sits in the layers beneath the fab. Advanced-node fabrication rests on capabilities India has only partly built. EUV lithography, the tool that patterns sub-7nm features, is competitive globally and tightly held. High-purity wafers and advanced photoresists and chemicals are being developed but not yet at leading-edge scale domestically. The manufacturing equipment, speciality chemicals, wafers, gases and design technologies that a leading-edge fab consumes continue to be sourced from abroad. A sub-7nm line is not a single machine but an ecosystem; without the supplier base beneath it, the fab cannot stand.

This is why the current programmes begin at 28 nm. Mature nodes serve automotive, power, industrial and a large share of consumer demand, and they let a domestic ecosystem — trained workers, supplier relationships, yield discipline — accumulate before the leap to the leading edge. The ISM 2.0 roadmap makes the sequencing explicit: it sets 3 nm and 2 nm nodes as targets for 2035.

What it would take is the patient build-out of that foundation. Advanced fabrication follows from mastery of the layers under it — lithography access, domestic wafers and process chemicals at scale, and the sustained yield engineering that only comes from running fabs. The Dholera fab reaching production in FY 2029–30, the deepening of the materials base, and the design talent already taping out at 12 nm are the rungs. The 2035 target names the summit. The climb between now and then is measured not in a single decision but in a decade of compounding capability.