Why doesn't India build a NAND flash memory chip?

Every NAND flash memory chip in an Indian smartphone, SSD, or data centre is imported. As of 2024, India brings in roughly 85% of its semiconductor chips, and NAND flash entirely. Only five nations host commercial NAND production — South Korea, Japan, Taiwan, the United States and China. India's share of that output is zero.

NAND is one of the hardest things to manufacture in the modern economy. The frontier now runs on 3D stacking, where memory cells are built in vertical towers; SK Hynix reached 321 layers in 2025. A modern memory fab is a multi-year, multi-billion-dollar commitment operating at process nodes below 15 nanometres. Fewer than a handful of companies worldwide have crossed that barrier, and the manufacturing ecosystem behind it — concentrated in Asia-Pacific, which holds over 85% of global capacity — is decades deep.

Where India stands is honest and narrow. What launched in 2025-26 is assembly, not fabrication. Micron Technology's facility at Sanand, Gujarat, backed by Rs 22,516 crore under the India Semiconductor Mission, began volume production in late 2025. It assembles and tests DRAM and NAND chips whose wafers are made in Micron's fabs outside India. Sahasra Semiconductors is building a similar assembly, test and packaging unit at Bhiwadi, Rajasthan, on a Rs 7.5 billion investment. This is the ATMP layer — real, but downstream of the die itself.

Upstream, the picture is early. Tata Electronics, with Taiwan's Powerchip, targets first silicon at its Dholera fab in December 2026 — but at a 28nm logic node, 50,000 wafers per month, with no NAND memory capability planned. India's design base is genuine: engineers here make up around 20% of the world's IC designers, and Qualcomm has taped out 2nm chips designed in India. The C2S programme has taped out 122 designs and fabricated 56 chips at 180nm in Mohali; the DLI scheme supports 24 design startups. None of this touches NAND cell architecture or memory IP.

The gap persists because the two critical layers beneath NAND simply do not exist domestically: no memory wafer fab, and no proprietary NAND design and IP. Assembly can be stood up in years; a competitive memory fab and its process technology cannot.

Closing it would mean building both — a sub-15nm memory fab and the 3D stacking process and cell architecture to fill it — atop the design talent and EDA access India already commands. The design foundation is in place. The fab is the mountain.