Process design kit (PDK)

Every chip designed anywhere on Earth begins with a file the designer never wrote. The process design kit — the PDK — is the bridge between an idea and a fabrication line: a set of files that models a specific foundry's process for the design tools, bundling design rules, device models in SPICE form, verification decks that check manufacturability, and standard cell libraries. As of 2026 India possesses this capability at only the narrowest edge, and remains fully dependent on imported PDKs from TSMC, Samsung and GlobalFoundries for advanced nodes.

The difficulty is intrinsic and unavoidable: a PDK cannot exist independently of a foundry. It must be created by and matched to one physical process, calibrated against real silicon, and it is specific to each node — 180nm, 65nm, 28nm cannot share a kit. Every new process generation demands a new PDK, and as nodes shrink the kits become more intricate, requiring larger teams to maintain and validate. This is why possessor foundries treat PDKs as proprietary assets. Only five nations — Taiwan, South Korea, the United States, China and Japan — sit at the top of this pyramid.

India's honest position rests on two working PDKs. The Semi-Conductor Laboratory near Chandigarh operates a 180nm CMOS PDK, adapted from Tower Semiconductor technology, and offers multi-project wafer runs used by IIT Madras for its SHAKTI processors and by defence and space projects. On 24 April 2026, IIT Madras's Centre of Excellence for Compound Semiconductors and Photonic Integrated Circuits, funded by MeitY, launched an indigenous silicon photonics PDK with over 50 verified components; multi-project wafer runs begin in July 2026, with SilTerra Malaysia as foundry partner and Bengaluru's izmo Microsystems handling packaging. The Bharat Semiconductor Research Centre, announced in October 2023 as an Indian counterpart to MIT's microelectronics lab and IMEC, remains at the study stage.

The gap persists because the PDK sits atop capabilities India is still assembling: a domestic foundry at competitive nodes, silicon-verified device models, verification rule sets, and validation against the Cadence and Synopsys tool ecosystems. There are no proprietary Indian PDKs for nodes between 90nm and 14nm.

Mature nodes are the accessible foothold — 130/180nm fetched only about $10 billion of roughly $108 billion in global foundry revenue in 2021 — but they are a real one. The government frames silicon photonics as a path to technology sovereignty, with a dedicated fab possible under India Semiconductor Mission 2.0 once commercial demonstration succeeds. Open-source PDKs such as SKY130 show the barrier is lowering; closing it fully means pairing each kit to an indigenous process line.