Specialty analog process node

India imports nearly all of the specialty analog chips that run its cars, factories, phones and power grids. As of 2026, its dependence on Taiwan, the United States and Japan for high-volume specialty analog runs at close to 100 per cent.

These are not the leading-edge logic chips that dominate headlines. Foundational analog and embedded chips made in the 45nm-to-130nm range are ubiquitous — in automobiles, industrial equipment, notebook computers and phone circuit boards. The difficulty is not shrinking transistors but precision: dual-gate oxides, precision capacitors, high-resistance poly, deep-well noise isolation, and specialised process modules like BCD for power management or SiGe for radio-frequency work. Analog behaviour is analogue — hard to model, hard to yield, dependent on years of process integration expertise. Only around ten nations host the world's specialty analog foundries, among them TSMC, GlobalFoundries and Tower Semiconductor.

India's single indigenous foothold is the Semiconductor Laboratory (SCL) in Chandigarh/Mohali, the country's sole fab capable of analog, mixed-signal and digital ICs. Its 180nm CMOS process was adapted from Israel's Tower Semiconductor and augmented with Bi-CMOS in 2016 with IIT-Bombay. In March 2025, SCL and ISRO delivered VIKRAM3201 and KALPANA3201 space processors, alongside 24-bit sigma-delta ADCs and regulator ICs for space avionics. But SCL's throughput is estimated near 4,000 wafers a month, and it cannot serve the commercially relevant 28-90nm nodes at all.

The gap persists because a single mature-node public fab cannot substitute for the layered ecosystem that specialty analog demands. The missing capabilities are structural: BCD and RF-SOI/SiGe process technologies stand at none domestically; competitive 28-65nm nodes are only emerging; design IP libraries, automotive-grade AEC-Q100/Q200 qualification, and skilled process-integration workforces are all early-stage. Fabrication equipment remains export-controlled and imported. SCL's own history — its Chandigarh complex gutted by fire in 1989 — is a reminder of how long the climb back takes.

What it would take is now partly visible in the pipeline. The India Semiconductor Mission had approved twelve projects across six states by May 2026, totalling roughly Rs 1.64 lakh crore. The largest is Tata Electronics' Rs 91,000 crore Dholera fab with Taiwan's PSMC, targeting 28-110nm logic and analog at 50,000 wafers a month, with first silicon targeted for December 2026. A Tower-Adani JV was approved in Maharashtra in 2024, and SiCSem's silicon-carbide fab in Odisha in 2025. Volume, node breadth, qualification and design IP must now converge — the difference between a working line and a competitive one.